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Programming FPGA devices in Verilog and other thoughts

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Configurable Counter Waveform

Creating a Configurable Counter Circuit

Posts / Mark

In a previous post I designed a simple 4-bit counter circuit. The code for that circuit is shown below. That will be our starting point for today. For today I would like to modify the counter to make it a little more configurable. I want to add a new output signal that asserts when the […]

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Super Quick Syntax Highlighting Update

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This is just a very quick update on syntax highlighting. I’ve updated the syntax highlighting plugin since the last post on the subject. The change allows the plugin to correctly interpret and handle sized numbers, and this site now uses the updated plugin. While I was updating the code, I decided to start the process

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Configurable Counter Waveform

Test Bench for Verilog Behavioral Simulation

Posts / Mark

I will confess that I’ve been withholding some important information from you. I’ve touched upon the subject in several previous posts like the Verilog Introduction, or D-type Flip Flop. And if you’ve been trying to follow along using the source code from github you’ve surely caught me. I am surprised that no one has commented

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Shift Register Waveform

Building A Configurable Shift Register

Posts / Mark

Today I am back to building out a set of basic circuits that I can use in future projects. We already have a configurable counter circuit. Another useful component to have is a configurable shift register. A shift register is used in many situations, particularly for serial communications protocols like RS-232, USB, I2C and SPI.

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Syntax Highlighting Revisited

Posts / Mark

If you have been following my blog, you may recall from the Verilog Introduction post that I was looking for a plugin that supported syntax highlighting. I intend to write a lot more Verilog code, and if all goes well, this code will become more involved. So I really would like to utilize syntax highlighting

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Counter Waveform

Designing a Simple 4-bit Counter Circuit

Posts / Mark

This time I am going to design a simple counter circuit. This will build on concepts from the earlier sequential circuit design project. To keep this project simple this be only a 4-bit counter. We may want the ability to reset the counter, so in addition to the clk port I will define another input

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D-flip flop waveform

Exploring The D-Type Flip Flop

Posts / Mark

For the next project I am going to create a D-type flip flop (D-FF). This is a very simple sequential circuit. If you don’t recall what that is you may want to read this earlier post. There are many different kinds of flip flops, they are a common building block of digital circuits. Flip flops

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Image of Basys 3 Board

One of the Slide Switches and Many LEDs

Posts / Mark

For this next project I want to explore the on-board slide switches provided by the Basys 3. I want to keep this project simple and focused on the switches. The simplest idea I could come up with was connecting a switch to an LED. Turn one of the switches on and the LED goes on,

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Sequential Circuit Design Introduction (meet Blinky)

Posts / Mark

Last time we built an Exclusive Or circuit. And we talked briefly about the difference between a Combinational circuit and a Sequential circuit. Recall that in a combinational circuit the outputs are purely a function of the inputs. There is no state (or memory). And operation is not synchronized to a clock signal. This time

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Image of XOR input and output waveform

Building An Exclusive Or Circuit

Posts / Mark

Ok, now the development environment is setup. And we have solved my Hyper-V issue. For our first official Verilog design let’s tackle something simple that builds upon what we’ve already covered in earlier posts. Let’s build an Exclusive Or circuit (XOR), which is a simple two-input, one-output logic gate. Exclusive Or circuits are one of

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Recent Posts

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  • Ruminating on the concept of ROM circuits December 11, 2022
  • Sussing out SystemVerilog vs. Verilog November 27, 2022
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  • Meet the Firth of Forth January 22, 2022
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