Verilog Operators

Operator TypeSymbolDescriptionOperand Count
Arithmetic+
–
*
/
%
**		addition
subtraction
multiplication
division
modulus
exponentiation		2
2
2
2
2
2
Bitwise~
&
|
^		NOT
AND
OR
XOR		1
2
2
2
Concatenation{ }
{ { } }		concatenation
replication		any
any
Conditional? :conditional (ternary)3
Equality==
!=
===
!==		equality
inequality
case equality
case inequality		2
2
2
2
Logical!
&&
||		NOT (logical)
AND (logical)
OR (logical)		1
2
2
Relational<
>
<=
>=		less than
greater than
less than or equal to
greater than or equal to		2
2
2
2
Shift<<
>>
<<<
>>>		shift left (logical)
shift right (logical)
shift left (arithmetic)
shift right (arithmetic)		2
2
2
2
Verilog Operators